VHDL Design of ARINC 429 Bus Protocol

Autor/innen

  • J. Joshua Bapu Department of Electronics and Communication Engineering, Dr. Sivanthi Aditanar College of Engineering, Tiruchendur, Tamil Nadu, India
  • I.J. Divya Prasanna Department of Electronics and Communication Engineering, Dr. Sivanthi Aditanar College of Engineering, Tiruchendur, Tamil Nadu, India
  • M. Sheela Merlin Department of Electronics and Communication Engineering, Dr. Sivanthi Aditanar College of Engineering, Tiruchendur, Tamil Nadu, India

Abstract

ARINC 429 is a data transfer standard for aircraft avionics which is also known as the Mark 33 DITS Specification (Digital Information Transfer System). It makes use of self-clocking and self-synchronizing techniques. ARINC-429 bus interface is used as a controlling function. It is a two-wire point-to-point serial data bus for control communications in Avionics. The bus operates at the speed of 100kb/sec; the ARINC429 is developed to provide interchangeability and interoperability of line replaceable units (LRUs) in commercial aircraft. File transfer of ARINC 429 protocol is bit oriented, handshake between the transmitter and receiver units is necessary at the initial condition. Predefined codes are sent from the source initiates communication with the receiver to determine compatibility between the units required for successful transmission. FPGA implementation of bus protocol can be done, for this purpose SRAM memory is used to sort the data into the buffer and make use of the information whenever needed. In order to enhance the security during transmission converters and key can be used. It is one of the modern techniques used in aircrafts and military.   Keywords: ARNIC429, LRU, independent transmitter and receiverCite this Article J. Joshua Bapu, I.J. Divya Prasanna, M. Sheela Merlin. VHDL Design of ARINC 429 Bus Protocol. Journal of Aerospace Engineering and Technology. 2016; 6(2): 21–27p.

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2016-07-04

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Bd. 6 Nr. 2 (2016)

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Research Articles

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