1-Bit Full Adder's Analysis and Comparison

Forfattere

  • Vijay Kumar Sherawat JALANDHAR
  • Ankush Chunn DR. B.R. AMBEDKAR NATIONAL INSTITUTE OF TECHNOLOGY,

Resumé

The full adder circuit forms the basis of majority of digital circuits. Improvement in a basic full adder circuit in terms of area, power and delay affect the performance of whole system. It becomes compulsory to investigate and analyze the performance of implementation of full adder circuit in literature, till now. In this paper, a study is carried out to look into performance parameters of full adder circuit using different logic styles. The simulations are carried out on SPICE using 0.25 um technology.   Keywords- CMOS Circuit, VLSI, Full adder, Adder Cite this Article Vijay Kumar Sherawat, Ankush Chunn, 1-Bit Full Adder's Analysis and Comparison, Journal of Electronic Design and Technology (JoEDT). 2015; 6(2): 1-6p.  

Forfatterbiografi

  • Vijay Kumar Sherawat, JALANDHAR

Publiceret

2015-07-09

Nummer

Sektion

Research Articles