Analysis of Resource Utilization for a Floating-Point Complex Multiplication in FPGA

Autoři

  • Anitha Mary assistant professor
  • Dojin Domnic
  • Dr. K. Rajasekaran

Klíčová slova:

Complex multiplication, Floating point, IP cores

Abstrakt

Complex multiplication is an important operation frequently used in the digital signal processing. This paper shows the resource utilization for a complex multiplication on Spartan3E by using a 9 bit floating point numbers. The proposed method clearly shows that resource utilization for complex multiplication is less than the IP cores proposed by the Xilinx Company. More over this paper shows how the significant and the exponent of the floating point number effect the resource utilization for a complex multiplication.  

Biografie autora

  • Anitha Mary, assistant professor
    department of EIE

Publikováno

2011-07-22

Číslo

Sekce

Review Articles