Low Power 8-Bit Square Root Carry Select Adder Constructed By Using 8 Transistor Full Adder

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  • A. Unmai Department of Electronics and Communication, Info Institute of Engineering, Coimbatore, Tamil Nadu, India

Klíčová slova:

Low power consumption, 8T full adder, XNOR-XNOR hybrid CMOS design, DSCH (Digital schematic)

Abstrakt

Carry select adder is the high speed adder which is designed to speed up arithmetic operations and to reduce the computation time. Carry select adder is used to perform fast arithmetic functions in data processing processors. Low power consumption, reduced area, reduced delay and increased speed are the most important features of the modern electronic system design. In this proposed work, 8 transistor full adder (8T full adder) is used as the building block for the 8-bit square-root carry select adder (8-b SQRT CSLA). This 8T full adder is designed by XNOR-XNOR hybrid CMOS design. So it is reliable in terms of power, area and speed. In this 8-b SQRT CSLA design power consumption is reduced compared with the regular carry select adder (CSLA). In this work performance is evaluated through the logic design and layout in 0.12 μm CMOS process technology.

Stažení

Publikováno

2014-03-28

Číslo

Vol 4 No 1 (2014)

Sekce

Research Articles

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