Characterization of High Performance Third Generation Current Conveyor using CMOS Technology

Autor/innen

  • Megha M. Patel Department of VLSI System Design, L. C. Institute of Technology, Bhandu, Gujarat, India
  • Nilesh D. Patel Department of VLSI System Design, Institute of Technology, Nirma University, Ahmedabad, India

Abstract

In this paper, Conventional Third generation(CCIII)  and Dual-Output Cascoded Third Generation Current Conveyor(DOCCIII) is presented. Here, both are simulated in ELDO SPICE Mentor Graphics using 90 nm CMOS technology at 0.8 V supply voltage. High performance cascoded current mirrors provide high output impedance. Third generation current conveyer has the advantages of wide current and voltage bandwidths, controlled intrinsic resistances at terminals X,Y and Z. By the use of high performance dual outputcascoded current mirrors provides high output impedance 21.25 MΩ and13.47MΩ instesd of inconventional CCIII output impedance 4.79 KΩ and voltage bandwidth is 704 MHz and current bandwidths are 300 MHz and greater than 1 GHz. In cascoded dual output third generation current conveyor, power dissipation is 6.94 µWand gives excellent input/output current gain.  Index Terms:CMOS Circuits,CCIII, DOCCIII, ELDO SPICE Mentor Graphics, power dissipation Cite this Article Megha M. Patel, Nilesh D. Patel, Characterization of High Performance Third Generation Current Conveyor using CMOS Technology, Journal of VLSI Design Tools and Technology (JoVDTT).2015; 5(2): 54–63p.

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2015-07-02

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Bd. 5 Nr. 2 (2015)

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Research Articles

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