Tuning Range, Phase Noise and Jitter Analysis of Current Starved Voltage Controlled Oscillator (VCO) for Digital PLL in 45 nm CMOS Technology

Autor/innen

  • Bharat H. Nagpara Department of Electronics and Communication, C. U. Shah College of Engineering & Technology, Wadhwan, Gujarat, India

Abstract

A wide tuning range, low phase noise and low jitter 100 MHz Voltage-Controlled Oscillator (VCO) for DPLL was designed and implemented by 45 nm CMOS process technology using LT spice. There was a relation between the frequency tuning range, phase noise, and jitter at output of the VCO after linearizing the gain. Simulations using PTM 45 nm CMOS process technology shows, that a wide operation frequency range (tuning range) from 3.240 MHz to 178.420 MHz is achieved for the full range control voltage from 0.10 to 1.0 volt, the measured phase noise 17.279 µV/Hz½ at 1 kHz offset from the 100 MHz centre frequency and the measured jitter is 244.5 ps at the 100 MHz centre frequency. The power dissipation at the center frequency is 1.30 µW with good linearity over the tuning range.   Index Terms: VCO, Current-Starved VCO, Design Equations, Linearizing the Current-Starved VCO Cite this Article Bharat H. Nagpara, Tuning Range, Phase Noise and Jitter Analysis of Current Starved Voltage Controlled Oscillator (VCO) for Digital PLL in 45nm CMOS Technology, Journal of VLSI Design Tools and Technology (JoVDTT). 2015; 5(2): 81–89p.

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2015-07-02

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Bd. 5 Nr. 2 (2015)

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Research Articles

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