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Vol. 3 No. 2 (2013)
Vol. 3 No. 2 (2013)
Published:
2013-09-05
Research Articles
Comparative Study of a 32 bit Clock Gated ALU based on Carry Skip Adder and Ripple Carry Adder
Ankit Mitra
1-5
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Design of Low Power Folded Cascode Current Mirror CMOS OTA and Implementation of 2nd Order Gm-C IF Filter with Analysis of S-Parameter
Kehul A. Shah, N. M. Devashrayee
12-19
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PDF
(USD 20)
Logic Optimization Algorithm based on Shannon’s Expansion: Reduction in Area, Power and Delay for Pass Gate Implementation
Usha Sandeep Mehta, Vaishali Dhare, Harikrishna Parmar, Rahul A. Shah
20-30
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PDF
(USD 20)
Review Articles
Cogeneration of Fast Motion Estimation Processor and Algorithms Using Loss Less Compression
M. Viji, S. Chitra
6-11
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PDF
(USD 20)
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