Design and Performance Trends of Low Power Sigma-Delta A/D Converters

Autores/as

  • Saima Bashir Department of Electronics and Communication Engineering, Shri Mata Vaishno Devi University, Katra, India
  • Suhaib Ahmed Department of Electronics and Communication Engineering, Shri Mata Vaishno Devi University, Katra, India
  • Vipan Kakkar Department of Electronics and Communication Engineering, Shri Mata Vaishno Devi University, Katra, India

Palabras clave:

ADC, Sigma Delta, Over Sampling Ratio, Noise Shaping, Low Power, Speed

Resumen

Analog-to-Digital Converters (ADCs) act as the bridge linking the real world and the digital world, i.e., they can covert the analog signal to the digital signal, and hence benefit to the storage, processing and transmission of the data. This paper presents a first of its kind study on the various Sigma-Delta (ΣΔ) ADC architectures proposed to achieve low power consumption and their performances have been compared with respect to the parameters such as resolution, sampling frequency, oversampling ratio, signal-to-noise ratio among others. The performance errors invoked in the ΣΔ modulators has also been studied along with their remedies. Finally, trade-offs between various performance parameters and the techniques for reducing power consumption of a ΣΔ converter at high resolution with minimum noise has been presented.  Keywords: ADC, Sigma-Delta, oversampling ratio, noise shaping, low power, speed Cite this Article Saima Bashir, Suhaib Ahmed, Vipan Kakkar. Design and Performance Trends of Low Power Sigma-Delta A/D Converters. Journal of VLSI Design Tools and Technology. 2016; 6(2):      5–12p.

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Publicado

2016-06-08

Número

Vol. 6 Núm. 2 (2016)

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