Design and Analysis of Source Current Effect on Preamplifier-Positive Feedback-based CMOS Comparator Using 90 nm Technology

Autori

  • Vijay Savani Institute of Technology, Nirma University
  • N. M. Devashrayee Institute of Technology, Nirma University

Parole chiave:

CMOS, deep-sub-micron technology, threshold voltage, comparator

Abstract

One of the most important and essential components of the data converter circuit is the comparator and this paper presents the implementation and characterization of the basic and simplest CMOS comparator in 90 nm technology. Once the technology scales down, the design and implementation becomes an essential issue at sub-micron and deep-sub-micron technology. The behavior of the threshold voltage in the CMOS is not a linear quantity when the parameters of the CMOS are scaled down. The paper shows implementation and characterization of the basic comparator in 90 nm technology. The simulation has been carried out for the different values of the current biasing to show how it effects the power dissipation and the delay. The implementation has been carried out using Mentor Graphics IC Studio tool and simulation is being carried out using Eldo tool.

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Pubblicato

2013-12-27

Fascicolo

V. 3 N. 3 (2013)

Sezione

Research Articles

Licenza

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