A New Sub-1 Volt Reference for Low Voltage Application Based on MOSFET’s Threshold Voltage Extractor

著者

  • Anil Kumar Saini CSIR-Central Electronics Engineering Research Institute
  • Megha Agarwal Thapar University, Patiala, India

キーワード:

threshold voltage extractor、 low-voltage、 process variation、 CMOS bandgap voltage reference

要旨

A CMOS voltage reference circuit featuring MOS transistors threshold voltage extractor has been developed. The circuit implemented using 0.35µm CMOS AMS process generates a reference of 574 mV for a power supply of 3.3V with 726µW power consumption. The circuit presents a variation of 43 ppm/ºC for the –10 to –110ºC temperature, and 18.6 dB PSRR at 1 KHz. A vital analytical approach is presented to provide a universal design guideline.

著者略歴

  • Anil Kumar Saini、 CSIR-Central Electronics Engineering Research Institute
    ScientistIC Design Group 
  • Megha Agarwal、 Thapar University, Patiala, India
    Student

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発行日

2013-04-15

巻号

巻 3 号 1 (2013)

セクション

Research Articles

ライセンス

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