Analysis of VLSI Circuits Designed with Single and Dual Channel Strained Silicon MOSFETs in Nanoregime

著者

  • Neha Sharan
  • Ashwani Rana

キーワード:

Biaxial single channel strained MOSFET、 Biaxial dual channel strained MOSFET、 Carrier mobility、 Carrier velocity、 Compressive strain、 Delay、 Inverter、 Noise Margin、 Tensile strain.

要旨

In this paper, performance of the VLSI circuits designed with strained silicon MOSFETs is analysed and compared with bulk MOSFET. Emphasis is being given on the evaluation of speed, power and noise characteristics. An inverter circuit designed with single channel and dual channel biaxial strained MOSFETs of 40 nm channel length and 0.3 germanium mole-fraction is being taken to evaluate the performance through simulation. The device design and circuit simulation is done in Sentaurus TCAD tool. The designed strained silicon MOSFETs shows increased carrier mobility, carrier velocity and drive current than bulk MOSFET. Dual channel biaxial strained MOSFET shows even much better performance than single channel biaxial strained MOSFET. The inverter circuit designed with this dual channel biaxial strained silicon MOSFETs shows much lesser delay and power consumption as compared to circuit designed with single channel strained MOSFET and bulk MOSFETs. Thus, the circuits designed with strained silicon MOSFETs are preferred in digital applications for low power and high speed circuits.

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発行日

2011-07-22

巻号

巻 1 号 1 (2011)

セクション

Review Articles

ライセンス

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