Design of Low Power Resistor Less Flash ADC for UWB Receiver Applications

Авторы

  • Ankush Chunn Department of VLSI Design, Dr. B. R. Ambedkar National Institute of Technology, Jalandhar, Punjab, India
  • Rakesh Kumar Sarin DR. B.R. AMBEDKAR NATIONAL INSTITUTE OF TECHNOLOGY, JALANDHAR

Аннотация

In this paper, two designs of flash analog to digital converters (ADCs) based on threshold inverter quantization (TIQ) technique are presented. The parallel threshold inverter quantization (PTIQ) flash ADC exploits the advantage of reduction in capacitance and power consumption if the transistors are placed in parallel. Another design called low voltage tunable body bias (LVTBB) PTIQ ADC operates at near threshold voltage level to minimize the power consumption. The PTIQ and LVTBB ADC designs attain Figure of merit of 0.09625 picoJoule/conversion (pJ/conv) and 0.06 pJ/conv respectively which is comparable to the existing state of art ADCs.   Keywords: ADC, TIQ, PTIQ, LVTBB, threshold voltage, power consumptionCite this Article  Ankush Chunn and Rakesh Kumar Sarin. Design of Low Power Resistor Less Flash ADC for UWB Receiver Applications. Journal of VLSI Design Tools and Technology. 2016; 6(3):     71–87p. 

Биография автора

  • Ankush Chunn, Department of VLSI Design, Dr. B. R. Ambedkar National Institute of Technology, Jalandhar, Punjab, India

Загрузки

Опубликован

2016-12-08

Выпуск

Том 6 № 3 (2016)

Раздел

Research Articles

Лицензия

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