Performance Estimation of VLSI Design

作者

  • Arindam Sadhu Microelectronics & VLSI, Heritage Institute of Technology, Kolkata, W.B., India
  • Pritam Bhattacherjee Microelectronics & VLSI, Heritage Institute of Technology, Kolkata, W.B., India
  • Sabnam Koley Microelectronics & VLSI, Heritage Institute of Technology, Kolkata, W.B., India

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Propagation delay##common.commaListSeparator## NMOS##common.commaListSeparator## PMOS##common.commaListSeparator## Rise Time##common.commaListSeparator## Fall Time##common.commaListSeparator## Elmore Delay##common.commaListSeparator## Layout.

摘要

This paper explores performance estimation of VLSI design using simple RC delay model based an Elmore Delay Method. In this paper Pre-layout & Post-layout VLSI design flow for delay convergence is also shown.   Keyword: Propagation delay, NMOS, PMOS, Rise Time, Fall Time, Elmore Delay, Layout

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出版日期

2014-08-26

期號

卷 4 期 2 (2014)

分類

Review Articles

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