卷 6 期 1 (2016)

查看卷 6 期 1 (2016)

出版日期: 2016-01-20

Research Articles

A Novel Logic Styles used for Leakage Power Reduction in MOS Integrated Circuit

M. Hulkey##common.commaListSeparator##H. Upadhyay##common.commaListSeparator##K. Sujatha

1-5
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Hardware Implementation of Configurable Multi Image Fusion

SS. Malwadkar##common.commaListSeparator##WM. Mendre##common.commaListSeparator##SS. Agrawal

6-15
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Simulation Study of Tapered Shape FinFET

G. Musalgaonkar##common.commaListSeparator##A. Shrivastava##common.commaListSeparator##S. Singh##common.commaListSeparator##A. Acharya

21-31
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Switched Capacitor Based RC Filter

Jinal A. Prajapati##common.commaListSeparator##Prof. Mehul L. Patel

32-40
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Cluster Based Sleep Transistor Approach for Low Power 6T SRAM Cell

P. Raikwal##common.commaListSeparator##V. Neema##common.commaListSeparator##A. Verma

41-48
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Design of Single Bitline Novel 5T SRAM Cell to Reduce The Power Dissipation Using Cadence

J. K. Arya##common.commaListSeparator##A. Raman

49-54
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Implementation of Edge Detection Algorithm on FPGA using Hardware Software Co-Simulation

Bhupendra Fataniya##common.commaListSeparator##Akash Mecwan##common.commaListSeparator##Dhaval Shah

55-61
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Modeling of Voltage Buffer and Memristor Voltage Buffer Using 180 nm Technology

Herman Al Ayubi##common.commaListSeparator##Navaid Z. Rizvi##common.commaListSeparator##Piyush K. Mishra

62-72
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GDI Logic Implementation of Variable Sized CSLA Architectures Using 45 nm SOI Technology

Jubal Saji##common.commaListSeparator##Shoaib Kamal

77-78
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A Differentiator Based on Second Generation Current Controlled Conveyor

A. Kumar##common.commaListSeparator##R. Pandey

89-95
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Review Articles

A Review for Power Optimization in MOS Devices using Different Logic Styles

M. Hulkey##common.commaListSeparator##H. Upadhyay##common.commaListSeparator##K. Sujatha

16-20
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Review Paper on Static and Dynamic Power Dissipation of Novel CMOS SRAM Cell

Jitendra Krishna Arya##common.commaListSeparator##Ashish Raman

73-77
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