VLSI Transistor and Interconnect Scaling Overview

Abstract

In this paper, various types of device and interconnect scaling used for VLSI transistors are mentioned. Advanced device scaling techniques using SOI & FINFET technology are discussed for nano-devices. New technologies adopted at research level are stated here in brief.

Keywords: Scaling factor ‘s’, technology or process node, short-channel effects, drain-induced barrier lowering, punch through, surface scattering, velocity saturation, impact ionization, hot electrons, SOI, floating body, FinFET, quantum dot cellular automata